Reference
A working glossary
Short, practical definitions for the terms that recur across this site. Where a term has a fuller treatment elsewhere on these pages, we point to it.
Word
The natural unit of data for a given architecture — usually the width of the general-purpose registers and the integer ALU. “Word size” and “bit-width” are, for most practical purposes, synonyms. See Concepts for the long version.
Nibble
Four bits — half a byte, and exactly enough to encode one hexadecimal digit or one packed decimal digit. The 4-bit Intel 4004 operated a nibble at a time.
Byte / octet
Eight bits, the near-universal unit of addressable memory. “Octet” is the unambiguous term used in networking, where historically a byte was not always eight bits.
Register
Fast storage inside the processor core. The width of the general-purpose registers is the most defensible single definition of a machine's bitness. See the encyclopedic entry.
Data bus
The wires that carry operands between processor and memory. Its width governs throughput and can be narrower than the register width — as in the 16-bit-internal, 8-bit-external Intel 8088.
Address bus
The lines that select a memory location. The count of address lines, as a power of two, is the size of the address space. Independent of register width.
Bank switching
A hardware trick for reaching more memory than the address bus can name directly: a bank register selects which slab of physical memory appears in a fixed window of the address space. The classic escape hatch of 8-bit machines straining against their 64 KiB ceiling.
Segment / segment:offset
The Intel 8086's scheme for reaching 1 MiB with 16-bit
registers: a physical address is formed as segment × 16 + offset. Powerful, portable across the early
x86 line, and a lasting source of programmer folklore.
Flat memory model
A single, linear address space in which a pointer is simply a number from zero to the maximum, with no segments to compose. The gift of the 32-bit 80386 and every mainstream processor since.
Two's complement
The dominant way to represent signed integers in a fixed-width register, chosen because addition and subtraction work identically on signed and unsigned values. See the full article.
Sign extension
Widening a signed value to a larger register by replicating its top (sign) bit, so that −1 in 8 bits
(0xFF) becomes −1 in 32 bits (0xFFFFFFFF) rather than 255. A daily concern when data
crosses widths.
Endianness
The order in which the bytes of a multi-byte word are stored. Little-endian keeps the least-significant byte first; big-endian the most-significant. See Endianness.
Alignment
The requirement or preference that a value of width W sit at an address that is a multiple of W. Wider words impose stricter alignment and coax compilers into padding structures.
SIMD / vector width
Single Instruction, Multiple Data: registers that pack several values and operate on them in parallel. The source of the “128-bit” and “512-bit” figures on modern chips, which describe data width, not address width. See SIMD.
RISC / CISC
Two philosophies of instruction-set design — reduced versus complex — that shape how bit-width, instruction length and addressing modes trade off. See RISC.